Programming SDRAM modules with SPD EPROM's, BIOS settings and 3-2-2 notation:

Programming SDRAM modules with SPD EPROM's, BIOS settings and 3-2-2 notation:

SDRAM ICs are programmable. Values for programmable parameters are stored in the IC's Mode Registry at boot time. These values are set in a programmable register in the SDRAM IC which is set at power-up and remains set until the system is powered off. Programmable parameters include the Burst Mode, the CAS Latency (CL), the RAS Precharge Latency (tRP) and the The RAS to CAS delay (tRCD). Values for these attributes are read from the SPD EPROM on the module (See the SPD EPROM section) by the BIOS. The BIOS may use the SPD values, or the values may be overridden depending on the settings in your CMOS setup program. The final values are recorded in the 440BX registry. In a section below we document how to read these values from the 440BX registry.

In most cases these values must be overridden because the values in the SPD EPROM are incorrect. This is because the value of many parameters is dependent on bus speed. Since PC100 SDRAM may be used on boards with a 66MHz bus as well as boards with a 100MHz bus, the values stored in the SPD will frequently be set for the wrong bus speed.

In the Award BIOS you can find these settings in the "Chipset Features Setup." Change the "SDRAM Configuration" value from "By SPD" to "Disable." You can then set the respective values of "SDRAM CAS Latency," "SDRAM RAS to CAS Delay" and "SDRAM RAS Precharge" to the values of CL, tRCD and tRP respectively. In the CMOS setup these values are recorded as by values of clock tics denoted by 2T or 3T.

These three values, CL, tRCD and tRP, are often quoted with the notation 3-2-2 referring to tCL-tRCD-tRP. This should not be confused with burst timing notation as described elsewhere on this page. A value of 3-2-2 is optimal for current PC100 SDRAM on the market. 2-2-2 PC100 SDRAM has only been produced in low yields as described above. Module tolerances of 3-2-2 and 2-2-2 are most common. However, the Intel PC100 specification allows for a variety of tolerances ranging from 3-3-3 to 2-2-2.

Frequently a fourth parameter is referred to as the "DRAM Idle timer" in the BIOS. This is also known as the RAS cycle time (tRC). In the PC100 SDRAM specification this has a maximal value of 8. In an alternate notation 3-2-2 modules with a tRC of 8 are referred to as /3/2/2/8. The minimum standard for PC100 SDRAM is 3/3/3/8.